| Beijing Gpthink Technology Co.Ltd |
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Item Number:
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GP-FE1V |
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Product Name:
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FE1/ V.35 Interface Converter |
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Description:
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GP-FE1V is a FE1/V.35 framing structure interface converter adopting ASIC (application specific integrated circuit) design. It is capable of converting Nx64K continuous data flow into PCM signal of E1, with a rate up to 1984Kbps (time slot 0 is used to transmit synchronizing information).
Subscriber data is put within E1 frame, occupying only the needed time slot. Time slot is distributed freely according to the demand of the subscriber. When subscriber data rate is up to 2048Kbps, line transmission is of full transparent mode, i.e., non-framing structure.
The data port is V.35, with the data rate optional from 64K to 2048K depending on the number of the selected time slots. M34 connector is adopted.
Line interface is E1, which supports framing structure and non-framing structure and provides optional balanced or unbalanced connection mode.
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Features:
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supplies V.54 diagnosis function
V.35 rate Nx64kbps（N=1~31）optional arbitrarily
Supports four clock modes
Supports local analog/ digital loopback
Supports remote loopback function
Provides pseudo-random code test function
V.35 interface uses M34 standard connector
Supports framing and non-framing modes, with the occupied time slot selected arbitrarily
Balanced 120Ω/ unbalanced 75Ω optional
Available with independent structure and 19-inch rack-mounted structure (rack-mounted structure can be inserted with 16 modules)
AC 220V and DC 48V inputs may be selected for interface converters of both structures
For rack-mounted interface converter, dual power supply heat backup is provided to ensure a high operating reliability
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Specification:
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1) V35 interface timing (S5.1=OFF, S5.2=OFF), i.e., sending timing is set at V35 interface and the received data is synchronized via BUFF with V35 interface timing;
2) E1 interface receiving timing (S5.1=OFF, S5.2=ON), i.e., sending timing is E1 interface receiving timing and the received data is synchronized via BUFF with E1 interface receiving timing, under which local time slot setting can automatically track the opposite time slot setting;
3)E1 interface timing (S5.1=ON, S5.2=OFF), i.e., sending timing is E1 interface timing and the received data is synchronized via BUFF with E1 interface timing;
4)Main timing (S5.1=ON, S5.2=ON), i.e., sending timing is local crystal oscillation and the received data is synchronized via BUFF with local timing.
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